As one drive scheme for a liquid crystal display device, there is conventionally known a scheme in which “one pixel is composed of a plurality of (typically, two) sub-pixels, and liquid crystal is driven such that the luminances of the plurality of sub-pixels differ from each other” (hereinafter, referred to as the “pixel division scheme”). The pixel division scheme is a scheme adopted to improve the viewing angle characteristics of the liquid crystal display device.
FIG. 3 is a circuit diagram showing a configuration of a pixel circuit of a liquid crystal display device adopting the pixel division scheme. As shown in FIG. 3, a pixel formation portion 11 forming one pixel is composed of two sub-pixel portions (a first sub-pixel portion PIX1 and a second sub-pixel portion PIX2). Both of the sub-pixel portions (PIX1 and PIX2) include thin-film transistors (T1 and T2) connected at their gate electrodes to a gate bus line (scanning signal line) GL and connected at their source electrodes to a source bus line (video signal line) SL; pixel electrodes (E1 and E2) connected to the drain electrodes of the thin-film transistors (T1 and T2); liquid crystal capacitances (Clc1 and Clc2) formed by a common electrode EC serving as a counter electrode and the pixel electrodes (E1 and E2); and auxiliary capacitances (Ccs1 and Ccs2) formed by the pixel electrodes (E1 and E2) and CS bus lines (auxiliary capacitance wiring lines) (CSL1 and CSL2). A constant potential Vcom is provided to the common electrode EC. Note that a signal to be supplied to a CS bus line is hereinafter referred to as a “CS signal”. Note also that CS signals to be supplied to the CS bus lines CSL1 and CSL2 are denoted by reference characters CS1 and CS2, respectively.
In such a configuration, when the gate bus line GL is placed in a selected state, the thin-film transistors T1 and T2 are placed in an on state. Since the source electrode of the thin-film transistor T1 and the source electrode of the thin-film transistor T2 are connected to the same source bus line SL, the potential of the pixel electrode E1 in the first sub-pixel portion PIX1 and the potential of the pixel electrode E2 in the second sub-pixel portion PIX2 are equal to each other. Thereafter, the potential of one of the CS signal CS1 and the CS signal CS2 is allowed to increase and the potential of the other one is allowed to decrease, by which the potential of the pixel electrode E1 and the potential of the pixel electrode E2 change in opposite directions. By this, the pixel electrode E1 and the pixel electrode E2 have different potentials and thus the first sub-pixel portion PIX1 and the second sub-pixel portion PIX2 have different luminances. As a result, viewing angle characteristics are improved. Note that FIG. 19 shows the waveforms of the CS signal CS1 and the CS signal CS2 in a conventional example. As is grasped from FIG. 19, the CS signal CS1 and the CS signal CS2 alternately repeat a potential having a level higher by a predetermined magnitude than the potential Vcom of the common electrode EC and a potential having a level lower by a predetermined magnitude than the potential Vcom of the common electrode EC, every predetermined period.
Exemplary configurations of a liquid crystal display device adopting the pixel division scheme such as that described above are disclosed in, for example, Japanese Patent Application Laid-Open No. 2005-189804 and WO 2006/070829 A.